Questions? Comments? Feel free to email me – Clive “Max” Maxfield – at ). So, why don't we all visit Brian's site, and then send him an email of encouragement at telling him that we would very much like him to add videos, design files, and other “goodies” pertaining to his calculator project.
What he didn't realize is that – as the editor of Programable Logic DesignLine – my blog gets seen by countless FPGA designers (won't he be surprised – grin). In his email, Brian mentioned that his website is still in progress, and that he will proceed according to the amount of interest shown.
The interesting thing is that Brian contacted me through my website asking if I would care to add a link to his site. At the moment the site is somewhat sparsely populated with some cool photos. He then created a physical implementation of this model using a Xilinx Spartan-3 development kit.īrian has recently started to document his adventure on this VintageCalc website. In 2007, with the blessing of his academic supervisor, Brian used his knowledge of the Friden EC-130 as a vehicle to learn VHDL – in four weeks he had a model that represented the spirit of the original machine. Apparently Brian ran across one of these little rascals in 2004, just as he was about to take a break from work to commence a degree in computer engineering degree. Cauchi has created an FPGA-based implementation of an antique Friden EC-130 calculator, whose original memory was implemented in the form of a delay line (or were there multiple delay lines?).Ĭosting a whopping $2,195 in 1963, the Friden EC-130 contained around 325 transistors, 650 diodes, and employed a magnetostrictive delay-line memory. Now I have to say that I think this is rather cool.
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